Transactions and Journals
2024
1.
Ning Yang=, Fangxin Liu=, Zongwu Wang, Junping Zhao, Li Jiang*, " SearchQ:
Search-based Fine-Grained Quantization for Data-Free Model Compression,"accepted
by IEEE Transactions on Parallel and Distributed Systems (IEEE TCAS-AI),
2024 (Imp. Jour. in Design Automation) [PDF]
2.
Shiyuan Huang=, Fangxin Liu=, Tian Li, Zongwu
Wang, Ning Yang, Haomin Li, and Li Jiang*,
" STCO: Enhancing Training Efficiency via Structured Sparse Tensor
Compilation Optimization,"accepted by ACM Transactions on
Design Automation of Electronic Systems (TODAES), 2024 (CCF-B)
[PDF]
3. Fangxin Liu, Zongwu Wang, Wenbo Zhao, Ning Yang, Yongbiao Chen, Shiyuan Huang, Haomin Li, Tao Yang, Songwen Pei, Xiaoyao Liang and Li Jiang*, " Exploiting Temporal-Unrolled Parallelism for Energy-Efficient SNN Acceleration,"accepted by IEEE Transactions on Parallel and Distributed Systems (TPDS), 2024 (CCF-A) [PDF]
4.
Shiyuan Huang, Fangxin
Liu*, Tao Yang, Zongwu Wang, Ning Yang and Li
Jiang*, " SpMMPlu-Pro: An
Enhanced Compiler Plug-in for Efficient SpMM and
Sparsity Propagation Algorithm,"accepted by IEEE
Transactions
on
Computer-Aided Design of Integrated Circuits and Systems (TCAD),
2024 (CCF-A) [PDF]
5.
Fangxin Liu, Wenbo
Zhao, Zongwu Wang,Yongbiao
Chen, Xiaoyao Liang, and Li Jiang*,
"ERA-BS: Boosting the Efficiency of ReRAM-based PIM Accelerator with
Fine-Grained Bit-Level Sparsity,"accepted
by IEEE Transactions on Computers (TC), 2023 (CCF-A) [PDF]
6. Chen Nie*, Chenyu
Tang*,
Jie Lin, Huan Hu, Chenyang
Lv*, Ting
Cao, Weifeng
Zhang, Li Jiang, Xiaoyao Liang, Weikang Qian, Yanan
Sun, and Zhezhi
He, "VSPIM: SRAM Processing-in-Memory DNN
Acceleration via Vector-Scalar Operations,"accepted by
IEEE Transactions on Computers (TC), 2023 (CCF-A) [PDF]
7. Maosong Xie=, Yueyang Jia=, Chen Nie*, Zuheng
Liu, Alvin Tang, shiquan Fan, Xiaoyao
Liang, Li Jiang, Zhezhi He, and Yang Rui, "Monolithic 3D
Integration of 2D Transistors and Vertical RRAMs in 1T-4R Structure for
High-Density Memory,"accepted by Nature Communications(NC), 2023 (CCF-A) [PDF]
2022
8.
Fangxin Liu,Zongwu Wang,Yongbiao
Chen, Zhezhi He, Tao Yang, Xiaoyao
Liang, and Li Jiang*, "SoBS-X:Squeeze-Out Bit Sparsity for ReRAM-Crossbar-Based
Neural Network Accelerator,"accepted by IEEE
Transactions on Computer-Aided Design of Integrated Circuits and Systems(TCAD),
2022 (CCF-A)[PDF]
9.
Tao Yang, Dongyue Li,
Fei Ma, Zhuoran Song, Yilong Zhao, Jiaxi Zhang, Fangxin Liu and Li
Jiang*, "PASGCN: An ReRAM-Based PIM Design for GCN with Adaptively Sparsified Graphs,"accepted
by IEEE Transactions on Computer-Aided Design of Integrated Circuits and
Systems(TCAD), 2022 (CCF-A)[PDF]
10. Tao Yang,Hui Ma,Xiaoling Li,Fangxin Liu,Yilong Zhao,Zhezhi He and L8i Jiang*, "DTATrans: Leveraging Dynamic Token-based Quantization with Accuracy Compensation Mechanism for Efficient Transformer Architecture,"accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(TCAD),2022 (CCF-A)[PDF]
11. Zhuoran Song, Heng Lu, Li Jiang, Naifeng Jing, Xiaoyao Liang, "Real-Time Video Recognition via Decoder-Assisted Neural Network Acceleration Framework,"accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(TCAD),2022 (CCF-A)[PDF]
12.
Weidong Cao, Yilong
Zhao, (CO-first author), Boloor Adith Jagadish, Yinhe Han, Xuan Zhang*, Li Jiang*, "Neural-PIM:
Efficient Processing-In-Memory with Neural Approximation of Peripherals,"accepted
by IEEE Transactions on Computers (TC),
Accepted, 2022 (CCF-A)[PDF]
13.
Fangxin Liu, Wenbo Zhao, Yongbiao Chen, Zongwu Wang, Tao
Yang and Li Jiang*, "SSTDP: Supervised Spike Timing Dependent
Plasticity for Efficient Spiking Neural Network Training," accepted by
Frontiers in Neuroscience, section Neuromorphic Engineering, 2022[PDF]
14. Fangxin Liu, Wenbo Zhao, Zongwu Wang, Yilong Zhao, Tao Yang, Yiran Chen and Li Jiang*, "IVQ: In-Memory Acceleration of DNN Inference Exploiting Varied Quantization," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(TCAD),2022 (CCF-A)[PDF]
15. Zhuoran Song, Yihong Xu, Zhezhi He, Li Jiang, Naifeng Jing, Xiaoyao Liang, "CP-ViT: Cascade Vision Transformer Pruning via Progressive Sparsity Prediction," CoRR abs/2203.04570,2022 [PDF]
16. Zhuoran Song, Yihong Xu, Han Li, Naifeng Jing, Xiaoyao Liang, Li Jiang, "DNN Training Acceleration via Exploring GPGPU Friendly Sparsity," CoRR abs/2203.05705,2022 [PDF]
17. Yilong Zhao, Li Jiang*, Mingyu Gao, Naifeng Jing, Chengyang Gu, Qidong Tang, Fangxin Liu, Tao Yang, Xiaoyao Liang, " RePAST: A ReRAM-based PIM Accelerator for Second-order Training of DNN," CoRR abs/2210.15255,2022 [PDF]
2021
18.
Tao Yang, Zhezhi He, Tengchuan Kou, Qingzheng Li, Qi
Han, Haibao Yu, Fangxin
Liu, Yun Liang, and Li Jiang. 2021. BISWSRBS: A Winograd-based CNN Accelerator
with a Fine-grained Regular Sparsity Pattern and Mixed Precision Quantization.
ACM Trans. Reconfigurable Technol. Syst. 14, 4, Article 18 (TRTS)
(December 2021), 28 pages. (CCF-B)[PDF]
19.
Zhuoran Song, Yanan Sun, Lerong Chen, Tianjian Li, Naifeng Jing, Xiaoyao Liang, Li Jiang*, "ITT-RNA:
Imperfection Tolerable Training for RRAM-Crossbar-Based Deep Neural-Network
Accelerator," in IEEE Transactions on Computer-Aided Design of Integrated
Circuits and Systems (TCAD), vol. 40, no. 1, pp. 129-142, Jan. 2021 (CCF-A)[PDF]
20.
Yanan Sun, Chang Ma, Zhi Li, Yilong Zhao, Jiachen
Jiang, Weikang Qian, Rui Yang, Zhezhi
He, and Li Jiang*, "Unary Coding and Variation-Aware Optimal
Mapping Scheme for Reliable ReRAM-based Neuromorphic Computing, "IEEE
Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD),
2021, PP(99):1-1.(CCF-A)[PDF]
21. Hongtao Zhong, Shengjie Cao, Li Jiang, Xia An, Vijaykrishnan Narayanan, Yongpan Liu, Huazhong Yang and Xueqing Li, "DyTAN: Dynamic Ternary Content Addressable Memory Using Nanoelectromechanical Relays, "IEEE Transactions on very large scale intergration (VLSI) systems, vol. 29, no. 11, Nov.2021,PP:1981-1993 (CCF-B)[PDF]
2020
22. Fangxin Liu, Wenbo Zhao, Yanzhi Wang, Changzhi Dai, Li Jiang, "AUSN: Approximately Uniform Quantization by Adaptively Superimposing Non-uniform Distribution for Deep Neural Networks, "CoRR abs/2007.03903[PDF]
23.
Li Jiang, Zhuoran Song, Haiyue
Song, Chenwen Xu, Qiang Xu, Naifeng
Jing, Weifeng Zhang, Xiaoyao
Liang: Energy-Efficient and Quality-Assured Approximate 1 Computing Framework
Using a Co-Training Method. ACM Transactions on Design Automation of Electronic
Systems (TODAES), Vol. 24, No. 6, Article 59. August 2019. (CCF-B)[PDF]
24. Yanan Sun, Jiawei Gu, Weifeng He,
Qin Wang, Naifeng Jing, Zhigang Mao, Weikang Qian, Li Jiang*: Energy-Efficient
Nonvolatile SRAM Design Based on Resistive Switching Multi-Level Cells. IEEE
Trans. on Circuits and Systems (TCAS), 66-II(5):
753-757 (2019)[PDF]
2018
25. Li Jiang, Tianjian Li, Naifeng Jing, Nam
Sung Kim, Minyi Guo, and Xiaoyao
Liang: CNFET-based high throughput SIMD architecture. IEEE Trans. on CAD of
Integrated Circuits and Systems (TCAD), 37(7):1331-1344, 2018. (CCF-A)[PDF]
26. Chen Wang, Yanan Sun, Shiyan Hu, Li Jiang, and Weikang Qian: Variation-aware global placement for
improving timing-yield of carbon-nanotube field effect transistor circuit. ACM
Trans. Design Autom. Electr. Syst. (TODAES),
23(4):44:1-44:27, 2018. (CCF-B)[PDF]
27. Jianfei Wang, Qin Wang, Li Jiang, Chao Li, Xiaoyao
Liang, and Naifeng Jing. IBOM: an integrated and
balanced on-chip memory for high performance gpgpus.
IEEE Trans. Parallel Distrib. Syst. (TPDS),
29(3):586-599, 2018. (CCF-A)[PDF]
2017
28. Jianfei Wang, Fengfeng Fan, Li Jiang, Xiaoyao Liang, and Naifeng Jing: Incorporating
selective victim cache into GPGPU for high-performance computing. Concurrency
and Computation: Practice and Experience, 29(24), 2017. (CCF-C)[PDF]
29. Naifeng Jing, Shunning Jiang, Shuang Chen, Jingjie
Zhang, Li Jiang, Chao Li, and Xiaoyao Liang:
Bank stealing for a compact and efficient register file architecture in GPGPU.
IEEE Trans. VLSI Syst. (TVLSI), 25(2):520-533, 2017. (CCF-B)[PDF]
2016
30. Tianjian Li, Feng Xie, Xiaoyao Liang, Qiang Xu,
Krishnendu Chakrabarty, Naifeng Jing, and Li Jiang*:
A novel test method for metallic cnts in cnfet-based srams. IEEE Trans. on
CAD of Integrated Circuits and
Systems (TCAD), 35(7):1192-1205, 2016. (CCF-A)[PDF]
31. Naifeng Jing, Li Jiang, Tao Zhang, Chao Li, Fengfeng
Fan, and Xiaoyao Liang: Energy-Efficient eDRAM-Based On-Chip Storage Architecture for GPGPUs. IEEE
Trans. on Computers (TC), 65(1):122-135, 2016. (CCF-A)[PDF]
2015
32. Xiaolong Zhang, Huiyun Li, Li
Jiang, and Qiang Xu. A low-cost TSV test and diagnosis scheme based on
binary search method. IEEE Trans. VLSI Syst. (TVLSI), 23(11):2639-2647,
2015. (CCF-B)[PDF]
2013
33. Li Jiang, Qiang Xu, and
Bill Eklow. On effective through-silicon via repair
for 3-d-stacked ics. IEEE Trans. on CAD of Integrated
Circuits and Systems (TCAD), 32(4):559-571, 2013. (CCF-A)[PDF]
2012
34. Li Jiang, Qiang Xu,
Krishnendu Chakrabarty, and T. M. Mak. Integrated test-architecture
optimization and thermal-aware test scheduling for 3-d socs under pre-bond
test-pin-count constraint. IEEE Trans. VLSI Syst. (TVLSI),
20(9):1621-1633, 2012. (CCF-B)[PDF]
Conferences
2025
35. Haomin Li=, Fangxin Liu=, Yichi Chen, Zongwu Wang, Shiyuan Huang, Ning Yang, Dongxu Lyu, and Li Jiang*, "FATE: Boosting the Performance of Hyper-DimensionalComputing Intelligence with Flexible Numerical DAta TypE," accepted by ACM International Symposium on Computer Architecture (ISCA), 2025(CCF-A)
36. Fangxin Liu=, Haomin Li=, Zongwu Wang, Bo Zhang, Mingzhe Zhang, Shoumeng Yan, and Li Jiang*, "ALLMod: Exploring Area-Eficiency of LUT-basedLarge Number Modular Reduction via HybridWorkloads," accepted by ACM/IEEE Design Automation Conference (DAC),2025(CCF-A) [PDF]
37. Zongwu Wang=, Peng Xu=, Fangxin Liu, Yiwei Hu, Qingxiao Sun,Gezi Li, Cheng Li, Xuan Wang and Li Jiang*, "MILLION: MasterIng Long-Context LLM InferenceVia Outlier-Immunized KV Product QuaNtization,"accepted by ACM/IEEE Design Automation Conference (DAC),2025(CCF-A) [PDF]
38. Fangxin Liu=, Shiyuan Huang=, Ning Yang=, Zongwu Wang, Haomin Li, and Li Jiang*, "CROSS: Compiler-Driven Optimization of Sparse DNNs Using Sparse/Dense Computation Kernels," accepted by IEEE International Symposium on High-Performance Computer Architecture (HPCA ),2025(CCF-A) [PDF]
39. Houshu he, Gang Li, Fangxin Liu, Li Jiang, Xiaoyang Liang, and Zhuoran Song, "GSArch: Breaking Memory Barriers in 3D Guassian Splatting Training via Arcitectural Support," accepted by IEEE International Symposium on High-Performance Computer Architecture (HPCA ),2025(CCF-A) [PDF]
40. Fangxin Liu=,Zongwu Wang
=, Peng Xu, Shiyuan Huang, and Li Jiang*,
" Exploiting
Differential-Based Data Encoding for Enhanced Query Efficiency," accepted
by Asia and South Pacific Design Automation Conference (ASPDAC),2025(CCF-C) [PDF]
41. Haomin Li=, Fangxin Liu=, Zewen Sun, Zongwu Wang, Shiyuan Huang ,Ning Yang, and Li Jiang*, " NeuronQuant: Accurate and Efficient Post-Training Quantization for Spiking Neural Networks," accepted by Asia and South Pacific Design Automation Conference (ASPDAC),2025(CCF-C) [PDF]
42.
Fangxin
Liu=, Ning Yang=, Zongwu Wang,
Xuanpeng Zhu, Haidong Yao, Xiankui
Xiong, Qi Sun, and Li Jiang*,
" OPS:
Outlier-aware Precision-Slice Framework for LLM Acceleration," accepted by
Design Automation & Test in Europe Conference & Exhibition (DATE),
2025 (CCF-B) [PDF]
43.
Fangxin
Liu=, Haomin Li=, Zongwu
Wang, Dongxu Lyu, and Li Jiang*, " HyperDyn: Dynamic Dimensional Masking for
Efficient Hyper-Dimensional Computing," accepted by Design Automation
& Test in Europe Conference & Exhibition (DATE), 2025 (CCF-B) [PDF]
44.
Haomin Li=, Fangxin
Liu=, Zongwu Wang, Dongxu Lyu, Shiyuan
Huang, Ning Yang, Qi Sun, Zhuoran
Song, and Li Jiang*, " TAIL: Exploiting Temporal
Asynchronous Execution for Efficient Spiking Neural Networks with Inter-Layer
Parallelism," accepted by Design Automation & Test in Europe
Conference & Exhibition (DATE), 2025 (CCF-B) [PDF]
2024
45. Zongwu Wang, Fangxin Liu, Shiyuan Huang, Haomin Li, Li Jiang*, "COMPASS: SRAM-Based Computing-in-Memory SNN Accelerator with Adaptive Spike Speculation" IEEE/ACM International Symposium on Microarchitecture (MICRO), 2024 (CCF-A)[PDF]
46.
Zongwu
Wang, Fangxin Liu and Li Jiang*, "PS4: A Low Power SNN Accelerator with
Spike Speculative Scheme, "to appear in IEEE International Conference on
Computer Design (ICCD), 2024 (CCF-B)[PDF]
47.
Fangxin Liu, Ning
Yang, Zhiyan Song, Zongwu Wang and Li Jiang*,
" HOLES: Boosting Large Language Models Efficiency with
Hardware-friendly Lossless Encoding, "to appear in IEEE International
Conference on Computer Design (ICCD), 2024 (CCF-B)[PDF]
48.
Longyu
Zhao, Zongwu Wang, Fangxin Liu and Li Jiang*, " Ninja: A Hardware Assisted System for Accelerating Nested Address
Translation, "to appear in IEEE International Conference on Computer
Design (ICCD), 2024 (CCF-B)[PDF]
49.
Ning Yang, Fangxin Liu, Zongwu Wang, Zhiyan Song, Tao Yang and Li Jiang*, " T-BUS: Taming Bipartite Unstructured Sparsity for
Energy-Efficient DNN Acceleration, "to appear in IEEE International
Conference on Computer Design (ICCD), 2024 (CCF-B)[PDF]
50.
Zongwu
Wang, Fangxin Liu, Shiyuan
Huang, Longyu Zhao, Li Jiang*, "LowPASS: A Low
Power PIM-based Accelerator with Speculative Scheme for SNNs." IEEE/ACM International
Symposium on Low Power Electronics and Design (ISLPED), 2024 (CCF-C)[PDF]
51.
Zongwu Wang, Fangxin
Liu, Shiyuan Huang, Longyu Zhao, Li Jiang*,
"An Ultra-Efficient Memristor-Based DNN Framework with Structured Weight
Pruning and Quantization Using ADMM." IEEE/ACM
International Symposium on Low Power Electronics and Design (ISLPED), 2024 (CCF-C)[PDF]
52. Yilong Zhao*, Mingyu
Gao, Fangxin
Liu*, Yiwei Hu, Zongwu
Wang, Han Lin, Ji Li, He Xian, Hanlin
Dong, Tao Yang, Naifeng Jing, Xiaoyao Liang, Li Jiang*, "UM-PIM: DRAM-based PIM with Uniform &Shared Memory Space," accepted
by ACM International Symposium on Computer Architecture (ISCA), 2024(CCF-A)[PDF]
53. Boyu Tian,
Yiwei Li, Li Jiang, Shuangyu
Cai, Mingyu Gao*, " NDPBridge: Enabling Cross-Bank Coordination in Near-DRAM-Bank
Processing Architectures," accepted by ACM International Symposium on
Computer Architecture (ISCA), 2024(CCF-A)[PDF]
54. Fangxin Liu=, Ning Yang=, Zhiyan Song, Zongwu
Wang, Haomin Li, Shiyuan Huang, Zhuoran
Song, Songwen Pei, Li Jiang*, "INSPIRE: Accelerating Deep
Neural Networks via Hardware-friendly Index-Pair Encoding," accepted by
ACM/IEEE Design Automation Conference (DAC), 2024(CCF-A)[PDF]
55. Ning Yang=, Fangxin Liu=, Zongwu Wang, Haomin Li, Zhuoran Song, Songwen Pei, Li Jiang*, " EOS: An
Energy-Oriented Attack Framework for Spiking Neural Networks," accepted by
ACM/IEEE Design Automation Conference (DAC), 2024(CCF-A)[PDF]
56. Jiahao
Sun, Fangxin Liu*, Yijian Zhang, Li
Jiang*, Rui Yang*, " RTSA: An RRAM-TCAM based In-Memory-Search Accelerator for
Sub-100 ¦Ìs Collision Detection," accepted by Design
Automation & Test in Europe Conference & Exhibition (DATE), 2024
(CCF-B)[PDF]
57. Fangxin Liu=, Ning Yang=, Haomin
Li, Zongwu Wang, Zhuoran
Song, Songwen Pei and Li Jiang*,
"SPARK: Scalable and Precision-Aware Acceleration of Neural Networks via
Efficient Encoding," accepted by 30th IEEE International Symposium on
High-Performance Computer Architecture (HPCA ),2024(CCF-A) [PDF]
58. Fangxin Liu=, Haomin Li=, Ning
Yang, Yichi Chen, Zongwu
Wang, Tao Yang, Li Jiang*, "PAAP-HD: PIM-Assisted Approximation for
Efficient Hyper-Dimensional Computing," accepted by 29th Asia and South
Pacific Design Automation Conference (ASPDAC),2024(CCF-C) [PDF]
59. Fangxin Liu=, Haomin Li=, Ning Yang, Zongwu Wang, Tao Yang, Li Jiang*, "TEAS:
Exploiting Spiking Activity for Temporal-wise Adaptive Spiking Neural
Networks," accepted by 29th Asia and South Pacific Design Automation
Conference(ASPDAC),2024(CCF-C) [PDF]
60. Shiyuan Huang=, Fangxin Liu=, Tian Li, Zongwu Wang, Haomin Li, Li
Jiang*, "TSTC: Enabling Efficient Training via Structured Sparse
Tensor Compilation," accepted by 29th Asia and South Pacific Design
Automation Conference (ASPDAC),2024(CCF-C) [PDF]
61. Haomin Li=, Fangxin Liu=, Yichi
Chen, Li Jiang*, "HyperFeel: An Efficient
Federated Learning Framework Using Hyperdimensional Computing," accepted
by 29th Asia and South Pacific Design Automation Conference (ASPDAC),2024(CCF-C) [PDF]
2023
62. Fangxin Liu, Ning Yang and Li Jiang*, "PSQ: An Automatic Search Framework for Data-Free Quantization on PIM-based Architecture," to appear in IEEE International Conference on Computer Design (ICCD), 2023 (CCF-B)[PDF]
63. Xuan Zhang, Zhuoran Song, Xing Li, Zhezhi He, Li Jiang, Naifeng Jing, Xiaoyao Liang, "HyAcc: A Hybrid CAM-MAC RRAM-based Accelerator for Recommendation Model," to appear in IEEE International Conference on Computer Design (ICCD), 2023 (CCF-B)[PDF]
64. Haomin Li, Fangxin Liu, Yichi
Chen and Li Jiang*, "HyperNode: An
Efficient Node Classification Framework Using HyperDimensional
Computing, "ACM/IEEE International Conference on Computer-Aided Design (ICCAD),
2023(CCF-B) [PDF]
65. Fangxin Liu, HaominLi, Yongbiao
Chen, TaoYang and Li Jiang*, "HyperAttack: An Effcient Attack
Framework for HyperDimensional Computing, "ACM/IEEE Design Automation Conference (DAC), 2023(CCF-A)[PDF]
66. Tao Yang, YiyuanZhou, QidongTang, FengXu, HuiMa, JieruZhao and Li Jiang*, "SpMMPlu: A Compiler Plug-in with Sparse IR for Efficient Sparse Matrix Multiplication, "ACM/IEEE Design Automation Conference (DAC), 2023(CCF-A)[PDF]
67. Zhuoran Song, Heng Lu, Gang Li, Li Jiang, Naifeng Jing, Xiaoyao Liang, "PRADA: Point Cloud Recognition Acceleration via Dynamic Approximation, " Design Automation & Test in Europe Conference & Exhibition (DATE), 2023 (CCF-B) (Best Paper Award)[PDF]
68. Fangxin Liu, Wenbo Zhao, Zongwu
Wang, XiaokangYang and Li Jiang*, "SIMSnn:A Weight-Agnostic
ReRAM-based Search-In-Memory Engine for SNN Acceleration, "Design Automation & Test in Europe Conference &
Exhibition (DATE), 2023 (CCF-B)[PDF]
69. Tao Yang, HuiMa, Yilong Zhao, Fangxin Liu, Zhezhi He, Xiaoli Sun and Li Jiang*, "PIMPR:PIM-based Personalized Recommendation with Heterogeneous Memory Hierarchy, "Design Automation & Test in Europe Conference & Exhibition (DATE), 2023 (CCF-B)[PDF]
70. Yaoyao Ye, Zixuan Liu, Jungan Liu, Li Jiang,
"ASDR: An Application-Specific Deadlock-Free Routing for Chiplet-Based Systems, "Proceedings of the 16th
International Workshop on Network on Chip Architectures, (NoCArc),
2023 (CCF-A)[PDF]
2022
71. Fangxin Liu, Zongwu Wang,Wenbo Zhao, Yongbiao
Chen, Xiaokang Yang and Li Jiang*,
"Randomize and Match: Exploiting Irregular Sparsity for Energy Efficient
Processing in SNNs, "to appear in IEEE International
Conference on Computer Design (ICCD), 2022 (CCF-B)[PDF]
72. Fangxin Liu, Haomin Li, Xiaokang
Yang, Li Jiang*, "L3E-HD: A Framework Enabling Efficient Ensemble
in High-Dimensional Space for Language Tasks, "International Conference on
Research and Development in Information Retrieval (SIGIR), 2022 (CCF-A)[PDF]
73. Fangxin Liu, Wenbo Zhao, Zongwu
Wang,Qidong Tang, Yongbiao Chen,Zhezhi He,Naifeng Jing,Xiaoyang Liang and Li Jiang*, "EBSP:
Evolving Bit Sparsity Patterns for Hardware-Friendly Inference of Quantized
Deep Neural Networks, "ACM/IEEE Design Automation Conference (DAC),
2022 (CCF-A)[PDF]
74. Fangxin Liu, Wenbo Zhao, Zongwu
Wang, Yongbiao Chen, Tao Yang, Zhezhi
He, Xiaokang Yang and Li Jiang*, "SATO:
Spiking Neural Network Acceleration via Temporal-Oriented Dataflow and
Architecture, "ACM/IEEE Design Automation Conference (DAC), 2022 (CCF-A)[PDF]
75. Fangxin Liu, Wenbo Zhao, Yongbiao
Chen, Zongwu Wang, Zhezhi
He, Rui Yang, Qidong Tang, Tao Yang, Cheng Zhuo and Li
Jiang*, "PIM-DH: ReRAM-based Processing-in-Memory Architecture for
Deep Hashing Acceleration, "ACM/IEEE Design Automation Conference (DAC),
2022 (CCF-A)[PDF]
76. Fangxin Liu, Wenbo Zhao, Zongwu
Wang,Yongbiao Chen, Li
Jiang*, "SpikeConverter: An Efficient
Conversion Framework Zipping the Gap between Artificial Neural Networks and
Spiking Neural Networks, "Association for the Advancement of Artificial Intelligence(AAAI), 2022 (CCF-A)[PDF]
77. Yu Gong, Zhihan Xu, Zhezhi He, Weifeng Zhang,
Xiaobing Tu, Xiaoyao Liang, Li Jiang*,
"N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based
Heterogeneous Computing Cores, "Proceedings of the 2022 ACM/SIGDA
International Symposium on Field-Programmable Gate Arrays (FPGA),
February 2022, Pages 112-122 (CCF-B)[PDF]
78. Tao Yang, Dongyue Li, Zhuoran Song, Yilong Zhao, Fangxin
Liu, Zongwu Wang, Zhezhi He
and Li Jiang*, "DTQAtten: Leveraging
Dynamic Token-based Quantization for Efficient Attention Architecture,
"Design Automation & Test in Europe Conference & Exhibition (DATE),
2022 (CCF-B)[PDF]
79. Zongwu Wang, Zhezhi He, Rui Yang, Shiquan Fan, Jie
Lin, Fangxin Liu, Yueyang Jia, Chenxi Yuan, Qidong Tang, and Li Jiang*, "Self-Terminated
Write of Multi-Level Cell ReRAM for Efficient Neuromorphic Computing,
"Design Automation & Test in Europe Conference & Exhibition (DATE),
2022 (CCF-B) (Best Paper Award)[PDF]
80. Chen Nie, Zongwu Wang, Qidong Tang, Chenyang Lv, Li Jiang, Zhezhi He,
"Cross-layer Designs against Non-ideal Effects in ReRAM-based
Processing-in-Memory System, "23rd International Symposium on Quality
Electronic Design(ISQED), 2022 (CCF-B)[PDF]
81. Qidong Tang, Zhezhi He, Fangxin
Liu, Zongwu Wang, Yiyuan
Zhou, Yinghuan Zhang, Li Jiang*, "HAWIS:
Hardware-Aware Automated WIdth Search for Accurate, Energy-Efficient
and Robust Binary Neural Network on ReRAM Dot-Product Engine," 27th Asia
and South Pacific Design Automation Conference (ASP-DAC), 2022, pp.
226-231 (CCF-C)[PDF]
2021
82. Fangxin Liu, Wenbo Zhao, Zhezhi
He, Yanzhi Wang, Zongwu
Wang, Changzhi Dai, Xiaoyao
Liang, Li Jiang*, "Improving Neural Network Efficiency via Post-training
Quantization with Adaptive Floating-Point, "IEEE/CVF International
Conference on Computer Vision (ICCV), 2021 (CCF-A)[PDF]
83. Tao Yang, Dongyue Li, Yibo Han,
Yilong Zhao, Fangxin Liu, Xiaoyao
Liang, Zhezhi He and Li Jiang*, "PIMGCN:
A ReRAM-Based PIM Design for Graph Convolutional Network Acceleration,
"ACM/IEEE Design Automation Conference (DAC), pages 1-6, 2021. (CCF-A)[PDF]
84. Min Li, Yu Li, Ye Tian, Li Jiang and Qiang Xu, "AppealNet: An Efficient and Highly-Accurate Edge/Cloud Collaborative Architecture for DNN
Inference, "ACM/IEEE Design Automation Conference (DAC), pages 1-6,
2021. (CCF-A)[PDF]
85. Fangxin Liu, Wenbo Zhao, Zhezhi
He, Zongwu Wang, Yilong Zhao, Yongbiao
Chen and Li Jiang*, "Bit-Transformer: Transforming Bit-level
Sparsity into Higher Preformance in ReRAM-based
Accelerator, "to appear in International Conference on Computer-Aided
Design (ICCAD), 2021(CCF-B, CSRanking top
conference)[PDF]
86. Hanchen Guo, Zhehan Lin, Yunfei
Gu, Chentao Wu∗, Li Jiang∗, Jie Li, Guangtao Xue, Minyi
Guo, "Lazy-WL: A Wear-aware Load Balanced Data Redistribution Method for
Efficient SSD Array Scaling, "to appear IEEE International Conference on
Cluster Computing (CLUSTER), 2021 (CCF-B)[PDF]
87. Fangxin Liu, Wenbo Zhao, Zhezhi
He, Zongwu Wang, Yilong Zhao, Tao Yang, Xiaoyao Liang, Naifeng Jing and Li
Jiang*, "SME: ReRAM-based Sparse-Multiplication-Engine to Squeeze-Out
Bit Sparsity of Neural Network, "International Conference on Computer
Design (ICCD), 2021 (CCF-B)[PDF]
88. Dongyue Li, Tao Yang, Lun Du, Zhezhi He, Li Jiang*,
"AdaptiveGCN: Efficient GCN Through Adaptively Sparsifying
Graphs, "to appear in International Conference on Information and
Knowledge Management (CIKM), 2021 (CCF-B)[PDF]
89. Ziqi Meng, Weikang Qian, Yanan Sun,
Yilong Zhao, Rui Yang, and Li Jiang*, "Digital offset for
RRAM-based neuromorphic computing: a novel solution to conquer cycle-to-cycle
variation," to appear in Proceedings of the 2021 Design, Automation, and
Test in Europe Conference (DATE), pages 1078-1083, 2021(CCF-B)[PDF]
90. Tao Yang, Hui Ma,Xiaoling Li,Fangxin Liu,Yilong Zhao, Zhezhi He and Li
Jiang*, "DTATrans: Leveraging Dynamic
Token-based Quantization with Accuracy Compensation Mechanism for Efficient
Transformer Architecture," to appear in Proceedings of the 2021 Design,
Automation, and Test in Europe Conference (DATE), 2021(CCF-B)[PDF]
91. Feiyang Wu, Zhuoran Song, Jing Ke, Li Jiang, Naifeng Jing and Xiaoyao Liang*,
"PIPArch: Programmable Image Processing
Architecture Using Sliding Array, "International Symposium on Parallel and
Distributed Processing with Applications (ISPA), 2021 (CCF-C)[PDF]
92. Yilong Zhao, Zhezhi He, Naifeng Jing Jing, Xiaoyao Liang and Li Jiang*, "Re2PIM: A
Reconfigurable ReRAM-based PIM Design for Variable-sized Vector-Matrix
Multiplication, "to appear in ACM Great Lakes Symposium on VLSI (GLSVLSI),
pages 15-20, 2021. (CCF-C)[PDF]
93. Chen Nie, Jie Lin, Huan Hu, Li Jiang, Xiaoyao Liang, Zhezhi He,
"Energy-Efficient Hybrid-RAM with Hybrid Bit-Serial based VMM Support,
"ACM Great Lakes Symposium on VLSI (GLSVLSI), pages 347-352, 2021.
(CCF-C)[PDF]
94. Fangxin Liu, Wenbo Zhao, Zongwu
Wang, Tao Yang and Li Jiang*, "IM3A: Boosting Deep Neural Network
Efficiency via In-Memory Addressing-Assisted Acceleration, "ACM Great
Lakes Symposium on VLSI (GLSVLSI), pages 253-258, 2021. (CCF-C)[PDF]
95. Zhuoran Song, Dongyue Li, Zhezhi
He, Xiaoyao Liang, Li Jiang*,
"ReRAM-Sharing: Fine-Grained Weight Sharing for ReRAM-Based Deep Neural
Network Accelerator, "to appear in International Symposium on Circuits and
Systems (ISCAS), 2021. (CCF-C)[PDF]
96. Xingyi Wang, Yu Li, Yiquan Chen, Shiwen Wang, Yin Du, Cheng He, YuZhong
Zhang, Pinan Chen, Xin Li, Wenjun Song, Qiang Xu, and
Li Jiang*, "On Workload-Aware DRAM Failure Prediction in
Large-Scale Data Centers, "to appear in IEEE VLSI Test Symposium(VTS),
2021. (CCF-C)[PDF]
97. Yunyan Hong, Qiang Xu and Li Jiang*, "Skimming and Scanning for Untrimmed Video Action Recognition, "to appear in International Congress on Image and Signal Processing, BioMedical Engineering and Informatics (CISP-BMEI), 2021[PDF]
98. Tianhong Shen, Yanan Sun, Weifeng
He, Zhi Li, Weiyi Liu, Zhezhi
He, Li Jiang, "A Ternary Memristive
Logic-in-Memory Design for Fast Data Scan, "to appear in IEEE
International Conference on Integrated Circuits, Technologies and Applications
(ICTA), 2021[PDF]
2020
99. Chaoqun Chu, Yanzhi Wang, Yilong Zhao, Xiaolong Ma, Shaokai Ye, Yunyan Hong, Xiaoyao Liang, Yinhe Han and Li
Jiang*: PIM-Prune: Fine-Grain DCNN pruning for Crossbar-based
Process-In-Memory architecture. ACM/IEEE Design Automation Conference (DAC),
page 1-6, 2020 (CCF-A)[PDF]
100. Zhuoran Song, Jianfei Wang, Tianjian
Li, Li Jiang, Jing Ke, Xiaoyao Liang, Naifeng Jing: GPNPU: Enabling Efficient Hardware-Based Direct
Convolution with Multi-Precision Support in GPU Tensor Cores. ACM/IEEE Design Automation Conference (DAC),
page 1-6, 2020 (CCF-A)[PDF]
101. Chang Ma, Yanan Sun, Weikang Qian,
Ziqi Meng, Rui Yang, Li Jiang*: Go Unary: A Novel Synapse Coding and
Mapping Scheme for Reliable ReRAM-based Neuromorphic Computing. Design,
Automation & Test in Europe Conference & Exhibition (DATE), 2020:
1432-1437 (CCF-B)[PDF]
102. Zhuoran Song, Yilong Zhao, Yanan Sun, Xiaoyao Liang, Li
Jiang*: ESNreram: An Energy-Efficient Sparse Neural
Network Based on Resistive Random-Access Memory. ACM Great Lakes Symposium on
VLSI, GLSVLSI 2020: 291-296 (CCF-C)[PDF]
103. Zhuoran Song, Bangqi Fu, Feiyang
Wu, Zhaoming Jiang, Li Jiang, Naifeng
Jing, Xiaoyao Liang: DRQ: Dynamic Region-based
Quantization for Deep Neural Network Acceleration. ISCA 2020: 1010-1021
(CCF-A)[PDF]
104. Tao Yang, Yunkun Liao, Jianping
Shi, Yun Liang, Naifeng Jing, Li Jiang*: A
Winograd-Based CNN Accelerator with a Fine-Grained Regular Sparsity Pattern.
International Conference on Field-Programmable Logic and Applications, FPL 2020,
Gothenburg, Sweden, August 31 - September 4, pages 254-261, 2020. (CCF-C)[PDF]
105. Xingyi Wang, Li Jiang*, Krishnendu Chakrabarty:
LSTM-based Analysis of Temporally- and Spatially Correlated Signatures for
Intermittent Fault Detection. VTS 2020: 1-6 (CCF-C)[PDF]
106. Q. Yan, L. Jiang* and S. S. Kia: Measurement
Scheduling for Cooperative Localization in Resource-Constrained Conditions. in
IEEE Robotics and Automation Letters, vol. 5, no. 2, pp. 1990-1997, April 2020
(ICRA, Top Tier)[PDF]
2019
107. Xiaoyi Sun, Krishnendu Chakrabarty, Ruirui
Huang, Yiquan Chen, Bing Zhao, Hai Cao, Yinhe Han, Xiaoyao Liang, Li
Jiang*: System level hardware failure prediction using deep learning. To
appear in ACM/IEEE Design Automation Conference (DAC), Las vegas, US, 2019. (CCF-A)[PDF]
108. Zhuoran Song, Ru Wang, Dongyu Ru, Zhenghao Peng, Hongru
Huang, Hai Zhao, Xiaoyao Liang and Li Jiang*:
Approximate Random Dropout for DNN Training Acceleration in GPGPU. In Design,
Automation & Test in Europe Conference & Exhibition (DATE),
Florence, Italy, March 21-25, 2019. (CCF-B)[PDF]
109. Houxiang Ji, Li Jiang*, Tianjian Li, Naifeng Jing, Jing Ke, Xiaoyao
Liang: HUBPA: high utilization bidirectional pipeline architecture for
neuromorphic computing. Proceedings of the 24th Asia and South Pacific Design
Automation Conference (ASP-DAC), Tokyo, Japan, January 21-24, 2019,
pages 249-254. (CCF-C)[PDF]
110. Geng Yuan,Xiaolong
Ma,Caiwen Ding,Sheng Lin,Tianyun Zhang,Zeinab S. Jalali,Yilong Zhao,Li Jiang,Sucheta
Soundarajan,Yanzhi Wang: An
Ultra-Efficient Memristor-Based DNN Framework with Structured Weight Pruning
and Quantization Using ADMM. IEEE/ACM International Symposium on Low Power Electronics and Design
(ISLPED), July 29-31, 2019. (CCF-C)[PDF]
111. Jianfei Wang, Li Jiang, Jing Ke, Xiaoyao Liang, Naifeng Jing: A
sharing-aware L1.5D cache for data reuse in GPGPUs. Proceedings of the 24th
Asia and South Pacific Design Automation Conference (ASP-DAC), Tokyo,
Japan, January 21-24, 2019, pages 388-393. (CCF-C)[PDF]
2018
112. Zhenghao Peng, Li Jiang*, Xuyang
Chen, Chengwen Xu, Naifeng
Jing, Xiaoyao Liang and Cewu
Lu: AXNet: ApproXimate
computing using an end-to-end trainable neural network. International
Conference on Computer-Aided Design (ICCAD), San Diego, CA, USA,
November 05-08, 2018, pages 11:1-11:8. (CCF-B, CSRanking
Top Conference)[PDF]
113. Haiyue Song, Li Jiang*, Chengwen Xu, Zhuoran Song, Naifeng Jing, Xiaoyao Liang and Qiang Xu: Invocation-driven Neural
Approximate Computing with a Multiclass-Classifier and Multiple Approximators.
In Proceedings of the International Conference on Computer-Aided Design (ICCAD),
San Diego, CA, USA, November 05-08, pages 50. (CCF-B)[PDF]
114. Houxiang Ji, Linghao Song, Li Jiang*, Hai Helen
Li, and Yiran Chen*: Recom: An efficient resistive accelerator for compressed
deep neural networks. In Design, Automation & Test in Europe Conference
& Exhibition (DATE), Dresden, Germany, March 19-23, 2018, pages
237-240. (CCF-B)[PDF]
115. Pu Pang, Yixun Zhang, Tianjian Li, Sung Kyu Lim, Quan Chen, Xiaoyao
Liang, and Li Jiang*: In-growth test for monolithic 3d integrated SRAM.
In Design, Automation & Test in Europe Conference & Exhibition (DATE),
Dresden, Germany, March 19-23, 2018, pages 569-572. (CCF-B)[PDF]
116. Haiyue Song, Xiang Song, Tianjian Li, Hao Dong, Naifeng Jing, Xiaoyao Liang, and Li
Jiang*: A FPGA friendly approximate computing framework with hybrid neural
networks: (abstract only). In Proceedings of the 2018 ACM/SIGDA International
Symposium on Field-Programmable Gate Arrays (FPGA), Monterey, CA, USA,
February 25-27, 2018, page 286, 2018. (CCF-B)[PDF]
2017
117. Tianjian Li, Xiangyu Bi, Naifeng
Jing, Xiaoyao Liang, and Li Jiang*: Sneak-path
based test and diagnosis for 1R RRAM crossbar using voltage bias technique. In
Proceedings of the 54th Annual Design Automation Conference (DAC),
Austin, TX, USA, June 18-22, 2017, pages 38:1-38:6, 2017. (CCF-A)[PDF]
118. Chengwen Xu, Xiangyu Wu, Wenqi
Yin, Qiang Xu, Naifeng Jing, Xiaoyao
Liang, and Li Jiang*: On quality trade-off control for approximate
computing using iterative training. In Proceedings of the 54th Annual Design
Automation Conference (DAC), Austin, TX, USA, June 18-22, 2017, pages
52:1-52:6, 2017. (CCF-A)[PDF]
119. Lerong Chen, Jiawen Li, Yiran Chen, Qiuping Deng, Jiyuan Shen, Xiaoyao Liang, and Li
Jiang*: Accelerator-friendly neural-network training: Learning variations
and defects in RRAM crossbar. In Design, Automation & Test in Europe
Conference & Exhibition (DATE), Lausanne, Switzerland, March 27-31,
2017, pages 19-24, 2017. (CCF-B)[PDF]
120. Tianjian Li, Yan Han, Xiaoyao Liang, Hsien-Hsin S.
Lee, and Li Jiang*: Fault clustering technique for 3d memory BISR. In
Design, Automation & Test in Europe Conference & Exhibition (DATE),
Lausanne, Switzerland, March 27-31, 2017, pages 560-565, 2017. (CCF-B)[PDF]
2016
121. Tianjian Li, Li Jiang*, Naifeng Jing, Nam Sung
Kim, and Xiaoyao Liang: CNFET-based high throughput register file architecture. In 34th IEEE International
Conference on Computer Design (ICCD), Scottsdale, AZ, USA, October 2-5,
2016, pages 662-669, 2016. (CCF-B)[PDF]
122. Fengfeng Fan, Jianfei Wang, Li Jiang, Xiaoyao Liang, and Naifeng Jing:
Applying victim cache in high performance GPGPU computing. In 15th
International Symposium on Parallel and Distributed Computing (ISPDC),
Fuzhou, China, July 8-10, 2016, pages 24-29, 2016. (CCF-C)[PDF]
123. Tianjian Li, Li Jiang*, Xiaoyao Liang, Qiang
Xu, and Krishnendu Chakrabarty: Defect tolerance for CNFET-based SRAMs. In 2016
IEEE International Test Conference (ITC), Fort Worth, TX, USA, November
15-17, 2016, pages 1-9, 2016. (CCF-B)[PDF]
124. Naifeng Jing, Jianfei Wang, Fengfeng
Fan, Wenkang Yu, Li Jiang, Chao Li, and Xiaoyao Liang: Cache-emulated register file: An integrated
on-chip memory architecture for high performance GPGPUs. In 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO),
Taipei, Taiwan, October 15-19, 2016, pages 14:1-14:12, 2016. (CCF-A)[PDF]
2015
125. Zelong Sun, Li Jiang, Qiang Xu, Zhaobo Zhang,
Zhiyuan Wang, and Xinli Gu: On test syndrome merging
for reasoning-based board-level functional fault diagnosis. In The 20th Asia
and South Pacific Design Automation Conference (ASP-DAC), Chiba, Japan,
January 19-22, 2015, pages 737-742, 2015. (CCF-C)[PDF]
126. Feng Xie, Xiaoyao Liang, Qiang Xu,
Krishnendu Chakrabarty, Naifeng Jing, and Li
Jiang*: Jump test for metallic cnts in cnfet-based SRAM. In Proceedings of the 52nd Annual Design
Automation Conference (DAC), San Francisco, CA, USA, June 7-11, 2015,
pages 16:1-16:6, 2015. (CCF-A)[PDF]
127. Li Jiang, Xiangwei Huang, Hongfeng Xie,
Qiang Xu, Chao Li, Xiaoyao Liang, and Huiyun Li: A novel TSV probing technique with adhesive test
interposer. In 33rd IEEE International Conference on Computer Design (ICCD),
New York City, NY, USA, October 18-21, 2015, pages 597-604, 2015. (CCF-B)[PDF]
128. Yiqing Hua, Chao Li, Weichao Tang, Li
Jiang, and Xiaoyao Liang: Building fuel powered
supercomputing data center at low cost. In Proceedings of the 29th ACM on
International Conference on Super-computing (ICS), Newport Beach/Irvine,
CA, USA, June 08 - 11, 2015, pages 241-250, 2015. (CCF-A)[PDF]
129. Naifeng Jing, Shuang Chen, Shunning Jiang, Li Jiang, Chao Li, and Xiaoyao Liang: Bank-stealing for conflict mitigation in
GPGPU register file: In IEEE/ACM International Symposium on Low Power
Electronics and Design (ISLPED), Rome, Italy, July 22-24, 2015, pages
55-60, 2015. (CCF-B)[PDF]
130. Li Jiang, Pu Pang, Naifeng Jing, Sung Kyu Lim, Xiaoyao
Liang, and Qiang Xu: On diagnosable and tunable 3D clock network design for
lifetime reliability enhancement. In 2015 IEEE International Test Conference (ITC),
Anaheim, CA, USA, October 6-8, 2015, pages 1-10, 2015. (CCF-B)[PDF]
131. Li Jiang and Qiang Xu.
Yield and reliability enhancement for 3D ICs: Dissertation summary: IEEE TTTC
E.J. mccluskey doctoral thesis award competition
finalist. In 2015 IEEE International Test Conference (ITC), Anaheim, CA,
USA, October 6-8, 2015, pages 1-11, 2015. (CCF-B)[PDF]
132. Li Jiang and Qiang Xu.
Fault-tolerant 3d-noc architecture and design: Recent advances and challenges.
In Proceedings of the 9th International Symposium on Networks-on-Chip (NOCS),
Vancouver, BC, Canada, September 28-30, 2015, pages 7:1-7:8, 2015.[PDF]
133. Tianjian Li, Hao Chen, Weikang Qian, Xiaoyao Liang, and Li Jiang*: On microarchitectural
modeling for cnfet-based circuits. In 28th IEEE
International System-on-Chip Conference (SOCC), Beijing, China,
September 8-11, 2015, pages 356-361, 2015.[PDF]
134. Chen Wang, Li Jiang*, Shiyan Hu, Tianjian
Li, Xiaoyao Liang, Naifeng
Jing, and Weikang Qian: Timing- driven placement for
carbon nanotube circuits. In 28th IEEE International System-on-Chip Conference
(SOCC), Beijing, China, September 8-11, 2015, pages 362-367, 2015.[PDF]
2013
135. Li Jiang, Fangming Ye, Qiang Xu, Krishnendu Chakrabarty, and Bill Eklow. On effective and efficient in-field TSV repair for
stacked 3d ics. In The 50th Annual Design Automation
Conference (DAC), Austin, TX, USA, May 29 - June 07, 2013, pages
74:1-74:6, 2013. (CCF-A)[PDF]
136. Zelong Sun, Li Jiang, Qiang Xu, Zhaobo Zhang,
Zhiyuan Wang, and Xinli Gu. Agentdiag:
An agent- assisted diagnostic framework for board-level functional failures. In
2013 IEEE International Test Conference (ITC), Anaheim, CA, USA,
September 6-13, 2013, pages 1-8, 2013. (CCF-B)[PDF]
2012
137. Qiang Xu, Li Jiang, Huiyun Li,
and Bill Eklow. Yield enhancement for 3d-stacked ics: Recent advances and challenges. In Proceedings of the
17th Asia and South Pacific Design Automation Conference (ASP-DAC),
Sydney, Australia, January 30 - February 2, 2012, pages 731-737, 2012. (CCF-C)[PDF]
138. Li Jiang, Qiang Xu, and
Bill Eklow. On effective TSV repair for 3d-stacked ics. In 2012 Design, Automation & Test in Europe
Conference & Exhibition (DATE), Dresden, Germany, March 12-16, 2012,
pages 793-798, 2012. (CCF-B)[PDF]
2010
139. Li Jiang, Rong Ye, and
Qiang Xu. Yield enhancement for 3d-stacked memory by redundancy sharing across
dies. In 2010 International Conference on Computer-Aided Design (ICCAD),
San Jose, CA, USA, November 7-11, 2010, pages 230-234, 2010. (CCF-B, CSRanking Top Conference)[PDF]
140. Li Jiang, Yuxi Liu, Lian
Duan, Yuan Xie, and Qiang Xu. Modeling TSV open defects in 3d-stacked DRAM. In
2011 IEEE International Test Conference (ITC), Austin, TX, USA, November
2-4, 2010, pages 174-182, 2010. (CCF-B)[PDF]
2009
141. Li Jiang, Qiang Xu,
Krishnendu Chakrabarty, and T. M. Mak. Layout-driven test-architecture design
and optimization for 3d socs under pre-bond test-pin-count constraint. In 2009
International Conference on Computer-Aided Design (ICCAD), San Jose, CA,
USA, November 2-5, 2009, pages 191-196, 2009. (CCF-B, CSRanking
Top Conference)[PDF]
142. Li Jiang, Lin Huang, and
Qiang Xu. Test architecture design and optimization for three-dimensional socs.
In Design, Automation and Test in Europe (DATE), Nice, France, April 20-24,
2009, pages 220-225, 2009. (CCF-B)[PDF]